1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC2G74 8 Pins 40μA 74LVC Series 8-XFDFN
SOT-23
74LVC2G74GS,115 Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
13 Weeks
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
8-XFDFN
Number of Pins
8
Operating Temperature
-40°C~125°C TA
Packaging
Tape & Reel (TR)
Series
74LVC
JESD-609 Code
e3
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
8
Type
D-Type
Terminal Finish
Tin (Sn)
Max Power Dissipation
300mW
Technology
CMOS
Voltage - Supply
1.65V~5.5V
Terminal Position
DUAL
Terminal Form
NO LEAD
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Supply Voltage
1.8V
Terminal Pitch
0.35mm
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
74LVC2G74
Function
Set(Preset) and Reset
Output Type
Differential
Number of Elements
1
Polarity
Non-Inverting
Supply Voltage-Max (Vsup)
5.5V
Number of Bits
1
Clock Frequency
200MHz
Propagation Delay
13.4 ns
Turn On Delay Time
2.5 ns
Family
LVC/LCX/Z
Logic Function
AND
Current - Quiescent (Iq)
40μA
Current - Output High, Low
32mA 32mA
Max Propagation Delay @ V, Max CL
4.1ns @ 5V, 50pF
Trigger Type
Positive Edge
Input Capacitance
4pF
fmax-Min
200 MHz
Clock Edge Trigger Type
Positive Edge
Height Seated (Max)
0.35mm
RoHS Status
ROHS3 Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$0.130388
$0.130388
10
$0.123008
$1.23008
100
$0.116045
$11.6045
500
$0.109477
$54.7385
1000
$0.103280
$103.28
74LVC2G74GS,115 Product Details
74LVC2G74GS,115 Overview
As a result, it is packaged as 8-XFDFN. D flip flop is embedded in the Tape & Reel (TR) package. As configured, the output uses Differential. Positive Edgeis the trigger it is configured with. There is an electric part mounted in the way of Surface Mount. A voltage of 1.65V~5.5Vis used as the supply voltage. A temperature of -40°C~125°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. In this case, it is a type of FPGA belonging to the 74LVC series. You should not exceed 200MHzin its output frequency. In total, it contains 1 elements. It consumes 40μA of quiescent There have been 8 terminations. The 74LVC2G74 family contains it. A voltage of 1.8V is used as the power supply for this D latch. Input capacitance of this device is 4pF farads. This D flip flop belongs to the family of LVC/LCX/Z. Surface Mount mounts this electronic component. Basically, it is designed with a set of 8 pins. The clock edge trigger type for this device is Positive Edge. There are 1bits in this flip flop. Vsup reaches its maximum value at 5.5V.