FDC6321C datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from ON Semiconductor stock available on our website
SOT-23
FDC6321C Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
10 Weeks
Lifecycle Status
ACTIVE (Last Updated: 2 days ago)
Contact Plating
Tin
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
SOT-23-6 Thin, TSOT-23-6
Number of Pins
6
Weight
36mg
Transistor Element Material
SILICON
Operating Temperature
-55°C~150°C TJ
Packaging
Tape & Reel (TR)
Published
2015
JESD-609 Code
e3
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
6
ECCN Code
EAR99
Resistance
450mOhm
Subcategory
Other Transistors
Max Power Dissipation
900mW
Terminal Form
GULL WING
Current Rating
680mA
Number of Elements
2
Number of Channels
2
Element Configuration
Dual
Operating Mode
ENHANCEMENT MODE
Power Dissipation
900mW
Turn On Delay Time
3 ns
Power - Max
700mW
FET Type
N and P-Channel
Transistor Application
SWITCHING
Rds On (Max) @ Id, Vgs
450m Ω @ 500mA, 4.5V
Vgs(th) (Max) @ Id
1.5V @ 250μA
Input Capacitance (Ciss) (Max) @ Vds
50pF @ 10V
Current - Continuous Drain (Id) @ 25°C
680mA 460mA
Gate Charge (Qg) (Max) @ Vgs
2.3nC @ 5V
Rise Time
9ns
Polarity/Channel Type
N-CHANNEL AND P-CHANNEL
Fall Time (Typ)
9 ns
Turn-Off Delay Time
55 ns
Continuous Drain Current (ID)
460mA
Threshold Voltage
800mV
Gate to Source Voltage (Vgs)
8V
Drain to Source Breakdown Voltage
25V
Dual Supply Voltage
25V
FET Technology
METAL-OXIDE SEMICONDUCTOR
FET Feature
Logic Level Gate
Nominal Vgs
800 mV
Feedback Cap-Max (Crss)
9 pF
Height
1.1mm
Length
3mm
Width
1.7mm
Radiation Hardening
No
REACH SVHC
No SVHC
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
3,000
$0.24126
$0.72378
6,000
$0.22569
$1.35414
15,000
$0.21013
$3.15195
30,000
$0.19923
$5.9769
FDC6321C Product Details
FDC6321C Description
These dual Numbp channel logic level enhanced mode field effect transistors are produced using OnSemi's proprietary high cell density DMOS technology. This very high-density process is specially tailored to minimize state resistance. The device is specially designed for low voltage applications as a substitute for digital transistors in load switch applications. Because there is no need for bias resistors, this dual digital FET can replace multiple digital transistors with different bias resistors.
FDC6321C Features
? N?Channel 0.68 A, 25 V
RDS(ON) = 0.45 @ VGS = 4.5 V
? P?Channel ?0.46 A, ?25 V
RDS(ON) = 1.1 @ VGS = ?4.5 V
? Very Low Level Gate Drive Requirements Allowing Direct
Operation in 3 V Circuits. VGS(th) < 1.0 V.
? Gate?Source Zener for ESD Ruggedness. >6 kV Human Body Model
? Replace Multiple Dual NPN & PNP Digital Transistors