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HD74HC113FP(E)

HD74HC113FP(E)

HD74HC113FP(E)

Renesas Electronics

2 Bit Flip Flop DUAL

SOT-23

HD74HC113FP(E) Datasheet PDF

non-compliant

Technical Specifications

Parameter NameValue
TypeParameter
Surface MountYES
Number of Terminals 14
ECCN (US) EAR99
Logic Family HC
Number of Channels per Chip 2
Number of Elements per Chip 2
Number of Element Inputs 2
Number of Element Outputs 1
Bus Hold No
Set/Reset Set
Triggering Type Negative-Edge
Maximum Propagation Delay Time @ Maximum CL (ns) 150@2V|[email protected]|26@6V
Absolute Propagation Delay Time (ns) 190
Process Technology CMOS
Input Signal Type Single-Ended
Maximum Low Level Output Current (mA) 5.2
Maximum High Level Output Current (mA) -5.2
Minimum Operating Supply Voltage (V) 2
Typical Operating Supply Voltage (V) 3.3|5|2.5
Maximum Operating Supply Voltage (V) 6
Maximum Quiescent Current (mA) 0.002
Propagation Delay Test Condition (pF) 50
Minimum Operating Temperature (°C) -40
Maximum Operating Temperature (°C) 85
Standard Package Name SOP
Supplier Package SOP
Mounting Surface Mount
Package Height 1.8
Package Length 10.1
Package Width 5.3
PCB changed 14
Lead Shape Gull-wing
Package Shape RECTANGULAR
Manufacturer Renesas Electronics Corporation
JESD-609 Code e6
Pbfree Code Yes
Part StatusObsolete
ECCN Code EAR99
Terminal Finish TIN BISMUTH
HTS Code8542.31.00.01
Technology CMOS
Terminal Position DUAL
Terminal FormGULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 2
Terminal Pitch1.27 mm
Reach Compliance Code unknown
Pin Count14
JESD-30 Code R-PDSO-G14
Qualification StatusNot Qualified
Polarity Inverting/Non-Inverting
Supply Voltage-Max (Vsup) 6 V
Temperature GradeINDUSTRIAL
Supply Voltage-Min (Vsup) 2 V
Number of Bits 2
Family HC/UH
Logic Function JK-Type
Seated Height-Max 2.2 mm
Output Polarity COMPLEMENTARY
Logic IC Type J-K FLIP-FLOP
Trigger Type NEGATIVE EDGE
Propagation Delay (tpd) 190 ns
Width 5.5 mm
Length 10.06 mm
RoHS StatusRoHS non-compliant
In-Stock:2594 items

HD74HC113FP(E) Product Details

HD74HC113FP(E) Overview


There is a trigger configured with NEGATIVE EDGE. An electronic device belonging to the family HC/UHcan be found here. 2bits are used in its design. There is a 6 Vmaximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be above 2 V. It uses the logic IC J-K FLIP-FLOP. There are 2 functions associated with the JK flip flop. 14pins are provided on the D latch.

HD74HC113FP(E) Features


2 Bits
2 Functions
14 pin count


HD74HC113FP(E) Applications


There are a lot of Renesas Electronics
HD74HC113FP(E) Flip Flops applications.


  • Data transfer
  • Latch
  • Registers
  • Memory
  • Frequency division
  • Memory
  • Event Detectors
  • Data Synchronizers
  • Asynchronous counter
  • Modulo – n – counter

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