74LV273N,112 Overview

As a result, it is packaged as 20-DIP (0.300, 7.62mm). There is an embedded version in the package Tube. In the configuration, Non-Invertedis used as the output. The trigger configured with it uses Positive Edge. Through Holeis in the way of this electric part. The supply voltage is set to 1V~5.5V. It is operating at a temperature of -40°C~125°C TA. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74LVseries FPGA. It should not exceed 100MHzin its output frequency. In total, it contains 1 elements. As a result, it consumes 160μA quiescent current and is not affected by external forces. A JK flip flop with a 3.5pFfarad input capacitance is used here.

74LV273N,112 Features

Tube package
74LV series

74LV273N,112 Applications

There are a lot of Rochester Electronics, LLC 74LV273N,112 Flip Flops applications.

• Storage registers
• Data Synchronizers
• Clock pulse
• Consumer
• Frequency division
• Set-reset capability
• Functionally equivalent to the MC10/100EL29
• CMOS Process
• Cold spare funcion
• Circuit Design