1.8V~3.6V 235MHz 8 Bit D-Type Flip Flop DUAL 74VCX16374 48 Pins 20μA 74VCX Series 48-TFSOP (0.240, 6.10mm Width)
SOT-23
74VCX16374TTR Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
48-TFSOP (0.240, 6.10mm Width)
Number of Pins
48
Operating Temperature
-55°C~125°C TA
Packaging
Tape & Reel (TR)
Series
74VCX
JESD-609 Code
e4
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
48
Type
D-Type
Terminal Finish
NICKEL PALLADIUM GOLD
Subcategory
FF/Latches
Packing Method
TAPE AND REEL
Technology
CMOS
Voltage - Supply
1.8V~3.6V
Terminal Position
DUAL
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
Supply Voltage
2.5V
Terminal Pitch
0.5mm
Base Part Number
74VCX16374
Function
Standard
Output Type
Tri-State, Non-Inverted
Number of Elements
2
Polarity
Non-Inverting
Number of Circuits
8
Number of Ports
2
Number of Bits
8
Clock Frequency
235MHz
Propagation Delay
8 ns
Turn On Delay Time
1 ns
Family
ALVC/VCX/A
Logic Function
D-Type, Flip-Flop
Current - Quiescent (Iq)
20μA
Current - Output High, Low
24mA 24mA
Max Propagation Delay @ V, Max CL
4.1ns @ 3.3V, 50pF
Trigger Type
Positive Edge
Input Capacitance
6pF
Number of Output Lines
3
Clock Edge Trigger Type
Positive Edge
Width
6.1mm
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
74VCX16374TTR Product Details
74VCX16374TTR Overview
It is embeded in 48-TFSOP (0.240, 6.10mm Width) case. A package named Tape & Reel (TR)includes it. The output it is configured with uses Tri-State, Non-Inverted. This trigger uses the value Positive Edge. It is mounted in the way of Surface Mount. A voltage of 1.8V~3.6Vis required for its operation. Currently, the operating temperature is -55°C~125°C TA. It belongs to the type D-Typeof flip flops. The FPGA belongs to the 74VCX series. Its output frequency should not exceed 235MHz Hz. A total of 2elements are present in it. This process consumes 20μA quiescents. There have been 48 terminations. The 74VCX16374family includes it. The D flip flop is powered by a voltage of 2.5V . There is 6pF input capacitance for this T flip flop. It is a member of the ALVC/VCX/Afamily of D flip flop. There is an electronic part that is mounted in the way of Surface Mount. Basically, it is designed with a set of 48 pins. This device's clock edge trigger type is Positive Edge. This part is included in FF/Latches. An electronic part with 8bits has been designed. The superior flexibility is achieved through the use of 8 circuits. In light of its reliable performance, this T flip flop is well suited for TAPE AND REEL. A D flip flop with 2embedded ports is available. There are 3 output lines in this JK flip flop.