STL110NS3LLH7 datasheet pdf and Transistors - FETs, MOSFETs - Single product details from STMicroelectronics stock available on our website
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STL110NS3LLH7 Datasheet
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Specifications
Name
Value
Type
Parameter
Contact Plating
Tin
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
8-PowerVDFN
Number of Pins
8
Transistor Element Material
SILICON
Operating Temperature
-55°C~150°C TJ
Packaging
Cut Tape (CT)
Series
STripFET™ H7
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
5
ECCN Code
EAR99
Technology
MOSFET (Metal Oxide)
Terminal Position
DUAL
Terminal Form
FLAT
Peak Reflow Temperature (Cel)
NOT SPECIFIED
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
STL110
JESD-30 Code
R-PDSO-F5
Number of Elements
1
Configuration
SINGLE WITH BUILT-IN DIODE
Power Dissipation-Max
4W Ta 75W Tc
Operating Mode
ENHANCEMENT MODE
Case Connection
DRAIN
Turn On Delay Time
26.4 ns
FET Type
N-Channel
Transistor Application
SWITCHING
Rds On (Max) @ Id, Vgs
3.4m Ω @ 14A, 10V
Vgs(th) (Max) @ Id
2.3V @ 1mA
Input Capacitance (Ciss) (Max) @ Vds
2110pF @ 25V
Current - Continuous Drain (Id) @ 25°C
120A Tc
Gate Charge (Qg) (Max) @ Vgs
13.7nC @ 4.5V
Rise Time
10.4ns
Drain to Source Voltage (Vdss)
30V
Drive Voltage (Max Rds On,Min Rds On)
4.5V 10V
Vgs (Max)
±20V
Fall Time (Typ)
12.5 ns
Turn-Off Delay Time
31.8 ns
Continuous Drain Current (ID)
120A
Gate to Source Voltage (Vgs)
20V
Drain-source On Resistance-Max
0.005Ohm
DS Breakdown Voltage-Min
30V
RoHS Status
ROHS3 Compliant
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$1.29000
$1.29
500
$1.2771
$638.55
1000
$1.2642
$1264.2
1500
$1.2513
$1876.95
2000
$1.2384
$2476.8
2500
$1.2255
$3063.75
STL110NS3LLH7 Product Details
STL110NS3LLH7 Description
STL110NS3LLH7 is an N-channel Power MOSFET transistor from the manufacturer STMicroelectronics with a voltage of 30V. The operating temperature of the STL110NS3LLH7 is -55°C~150°C TJ and its maximum power dissipation is 75W Tc. STL110NS3LLH7 has 8 pins and it is available in Cut Tape (CT) packaging way. This device exhibits low on-state resistance and capacitance for improved conduction and switching performance.