3V~18V 16MHz 4 Bit D-Type Flip Flop DUAL CD4076 16 Pins 20μA 4000B Series 16-SOIC (0.209, 5.30mm Width)
SOT-23
CD4076BNSRG4 Datasheet
non-compliant
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Specifications
Name
Value
Type
Parameter
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.209, 5.30mm Width)
Number of Pins
16
Operating Temperature
-55°C~125°C TA
Packaging
Tape & Reel (TR)
Series
4000B
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
16
Type
D-Type
Subcategory
FF/Latches
Packing Method
TAPE AND REEL
Technology
CMOS
Voltage - Supply
3V~18V
Terminal Position
DUAL
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Supply Voltage
5V
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
CD4076
Function
Reset
Qualification Status
Not Qualified
Output Type
Tri-State, Non-Inverted
Number of Elements
1
Polarity
Non-Inverting
Supply Voltage-Min (Vsup)
3V
Load Capacitance
50pF
Output Current
6.8mA
Number of Bits
4
Clock Frequency
16MHz
Propagation Delay
600 ns
Turn On Delay Time
60 ns
Current - Quiescent (Iq)
20μA
Output Characteristics
3-STATE
Current - Output High, Low
6.8mA 6.8mA
Max Propagation Delay @ V, Max CL
180ns @ 15V, 50pF
Trigger Type
Positive Edge
Input Capacitance
5pF
Number of Input Lines
4
fmax-Min
8 MHz
Clock Edge Trigger Type
Positive Edge
Max [email protected]
3000000Hz
Height Seated (Max)
2mm
Width
5.3mm
RoHS Status
ROHS3 Compliant
CD4076BNSRG4 Product Details
CD4076BNSRG4 Overview
The flip flop is packaged in a case of 16-SOIC (0.209, 5.30mm Width). Package Tape & Reel (TR)embeds it. There is a Tri-State, Non-Invertedoutput configured with it. It is configured with a trigger that uses Positive Edge. Surface Mountmounts this electrical part. Powered by a 3V~18Vvolt supply, it operates as follows. It is operating at a temperature of -55°C~125°C TA. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 4000Bseries FPGA. You should not exceed 16MHzin its output frequency. In total, it contains 1 elements. Despite external influences, it consumes 20μAof quiescent current. There are 16 terminations,JK flip flop belongs to CD4076 family. A voltage of 5V is used as the power supply for this D latch. The input capacitance of this JK flip flopis 5pF farads. This electronic part is mounted in the way of Surface Mount. Basically, it is designed with a set of 16 pins. This device has the clock edge trigger type of Positive Edge. This part is included in FF/Latches. 4bits are used in its design. Normally, the supply voltage (Vsup) should be kept above 3V. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TAPE AND REEL. With an output current of 6.8mA, it is possible to design the device in any way you want. 4input lines are available for you to choose from.