CSD86311W1723 datasheet pdf and Transistors - FETs, MOSFETs - Arrays product details from Texas Instruments stock available on our website
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CSD86311W1723 Datasheet
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Specifications
Name
Value
Type
Parameter
Factory Lead Time
6 Weeks
Lifecycle Status
ACTIVE (Last Updated: 3 days ago)
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
12-UFBGA, DSBGA
Number of Pins
12
Transistor Element Material
SILICON
Operating Temperature
-55°C~150°C TJ
Packaging
Tape & Reel (TR)
Series
NexFET™
JESD-609 Code
e1
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
12
ECCN Code
EAR99
Terminal Finish
Tin/Silver/Copper (Sn/Ag/Cu)
HTS Code
8541.29.00.95
Subcategory
FET General Purpose Power
Max Power Dissipation
1.5W
Terminal Position
BOTTOM
Terminal Form
BALL
Peak Reflow Temperature (Cel)
260
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
CSD86311
Pin Count
12
Qualification Status
Not Qualified
Number of Elements
2
Element Configuration
Dual
Operating Mode
ENHANCEMENT MODE
Power Dissipation
1.5W
Turn On Delay Time
5.4 ns
FET Type
2 N-Channel (Dual)
Transistor Application
SWITCHING
Rds On (Max) @ Id, Vgs
39m Ω @ 2A, 8V
Vgs(th) (Max) @ Id
1.4V @ 250μA
Input Capacitance (Ciss) (Max) @ Vds
585pF @ 12.5V
Gate Charge (Qg) (Max) @ Vgs
4nC @ 4.5V
Rise Time
4.3ns
Drain to Source Voltage (Vdss)
25V
Fall Time (Typ)
2.9 ns
Turn-Off Delay Time
13.2 ns
Continuous Drain Current (ID)
4.5A
Threshold Voltage
1V
Gate to Source Voltage (Vgs)
10V
Drain-source On Resistance-Max
0.051Ohm
Drain to Source Breakdown Voltage
25V
FET Technology
METAL-OXIDE SEMICONDUCTOR
FET Feature
Logic Level Gate
Nominal Vgs
1 V
Feedback Cap-Max (Crss)
13 pF
Height
625μm
Length
0m
Width
0m
Thickness
375μm
REACH SVHC
No SVHC
RoHS Status
ROHS3 Compliant
Lead Free
Contains Lead
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$5.494160
$5.49416
10
$5.183170
$51.8317
100
$4.889783
$488.9783
500
$4.613003
$2306.5015
1000
$4.351889
$4351.889
CSD86311W1723 Product Details
CSD86311W1723 Description
The device's design aims to produce the lowest gate charge and on-resistance while maintaining the best thermal performance in an extremely low profile. The device is best for battery-operated space-constrained applications in load management and DC-DC converters because to its low on-state and gate charge as well as its tiny footprint and low profile.