SN74AUP1G80DCKRE4 Overview

The flip flop is packaged in a case of 5-TSSOP, SC-70-5, SOT-353. It is included in the package Tape & Reel (TR). This output is configured with Inverted. This trigger uses the value Positive Edge. There is an electronic component mounted in the way of Surface Mount. It operates with a supply voltage of 0.8V~3.6V. Currently, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. In terms of FPGAs, it belongs to the 74AUP series. There should be no greater frequency than 260MHzon its output. Despite external influences, it consumes 0.9μAof quiescent current. A total of 5 terminations have been made. The 74AUP1G80family includes it. The power source is powered by 1.2V. This JK flip flop has a 1.5pFfarad input capacitance. It belongs to the family of electronic devices known as AUP/ULP/V. There is an electronic component mounted in the way of Surface Mount. With its 5pins, it is designed to work with most electronic flip flops. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. This RS flip flops is a part number FF/Latches. The flip flop is designed with 1bits. It reaches the maximum supply voltage (Vsup) at 3.6V. A normal operating voltage (Vsup) should remain above 0.8V. The superior flexibility of this product is achieved by using 1 circuits. As a result of its reliability, this D flip flop is ideally suited for TR.

SN74AUP1G80DCKRE4 Features

Tape & Reel (TR) package
74AUP series
5 pins
1 Bits

SN74AUP1G80DCKRE4 Applications

There are a lot of Texas Instruments SN74AUP1G80DCKRE4 Flip Flops applications.

• Memory
• QML qualified product
• Registers
• ATE
• Individual Asynchronous Resets
• Functionally equivalent to the MC10/100EL29
• Guaranteed simultaneous switching noise level
• CMOS Process
• Instrumentation
• Balanced 24 mA output drivers