SN74AUP1G80DCKRG4 Overview
The item is packaged in 5-TSSOP, SC-70-5, SOT-353cases. The package Tape & Reel (TR)contains it. T flip flop uses Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis positioned in the way of this electronic part. A voltage of 0.8V~3.6Vis used as the supply voltage. It is operating at a temperature of -40°C~85°C TA. This logic flip flop is classified as type D-Type. In this case, it is a type of FPGA belonging to the 74AUP series. You should not exceed 260MHzin the output frequency of the device. This process consumes 0.9μA quiescents. 5terminations have occurred. Members of the 74AUP1G80family make up this object. An input voltage of 1.2Vpowers the D latch. Input capacitance of this device is 1.5pF farads. It is a member of the AUP/ULP/Vfamily of D flip flop. This electronic part is mounted in the way of Surface Mount. A total of 5pins are provided on this board. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. It is included in FF/Latches. There are 1bits in its design. Vsup reaches 3.6V, the maximal supply voltage. The supply voltage (Vsup) should be maintained above 0.8V for normal operation. The superior flexibility of this product is achieved by using 1 circuits. Due to its reliability, this T flip flop is well suited for TR.
SN74AUP1G80DCKRG4 Features
Tape & Reel (TR) package
74AUP series
5 pins
1 Bits
SN74AUP1G80DCKRG4 Applications
There are a lot of Texas Instruments SN74AUP1G80DCKRG4 Flip Flops applications.
- Safety Clamp
- Balanced 24 mA output drivers
- Single Up Count-Control Line
- Matched Rise and Fall
- ESCC
- Set-reset capability
- Buffered Clock
- Frequency division
- Data transfer
- Guaranteed simultaneous switching noise level
