2V~5.5V 175MHz 8 Bit D-Type Flip Flop DUAL 74LV574 20 Pins 20μA 74LV Series 20-SOIC (0.209, 5.30mm Width)
SOT-23
SN74LV574ANSR Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
6 Weeks
Lifecycle Status
ACTIVE (Last Updated: 2 days ago)
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
20-SOIC (0.209, 5.30mm Width)
Number of Pins
20
Weight
266.712314mg
Operating Temperature
-40°C~85°C TA
Packaging
Tape & Reel (TR)
Series
74LV
JESD-609 Code
e4
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
20
Type
D-Type
Terminal Finish
Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory
FF/Latches
Packing Method
TR
Technology
CMOS
Voltage - Supply
2V~5.5V
Terminal Position
DUAL
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
Supply Voltage
2.5V
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
74LV574
Function
Standard
Qualification Status
Not Qualified
Output Type
Tri-State, Non-Inverted
Number of Elements
1
Polarity
Non-Inverting
Supply Voltage-Max (Vsup)
5.5V
Supply Voltage-Min (Vsup)
2V
Number of Circuits
8
Load Capacitance
50pF
Number of Ports
2
Output Current
16mA
Number of Bits
8
Clock Frequency
175MHz
Propagation Delay
19.6 ns
Turn On Delay Time
4.8 ns
Family
LV/LV-A/LVX/H
Logic Function
D-Type, Flip-Flop
Current - Quiescent (Iq)
20μA
Current - Output High, Low
16mA 16mA
Max Propagation Delay @ V, Max CL
10.6ns @ 5V, 50pF
Trigger Type
Positive Edge
Input Capacitance
1.8pF
Power Supply Current-Max (ICC)
0.02mA
Number of Input Lines
3
Count Direction
UNIDIRECTIONAL
Clock Edge Trigger Type
Positive Edge
Translation
N/A
Max [email protected]
45000000Hz
Height
2mm
Length
12.6mm
Width
5.3mm
Thickness
1.95mm
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
SN74LV574ANSR Product Details
SN74LV574ANSR Overview
The flip flop is packaged in 20-SOIC (0.209, 5.30mm Width). The Tape & Reel (TR)package contains it. Tri-State, Non-Invertedis the output configured for it. There is a trigger configured with Positive Edge. There is an electronic component mounted in the way of Surface Mount. A voltage of 2V~5.5Vis used as the supply voltage. It is operating at a temperature of -40°C~85°C TA. This D latch has the type D-Type. In this case, it is a type of FPGA belonging to the 74LV series. This D flip flop should not have a frequency greater than 175MHz. A total of 1elements are contained within it. As a result, it consumes 20μA of quiescent current without being affected by external factors. A total of 20 terminations have been made. D latch belongs to the 74LV574 family. Power is provided by a 2.5V supply. The input capacitance of this T flip flop is 1.8pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. In terms of electronic devices, this device belongs to the LV/LV-A/LVX/Hfamily of devices. The electronic part is mounted in the way of Surface Mount. This board is designed with 20pins on it. This device has the clock edge trigger type of Positive Edge. This RS flip flops is a part number FF/Latches. Flip flops designed with 8bits are used in this part. Vsup reaches 5.5V, the maximal supply voltage. The supply voltage (Vsup) should be kept above 2V for normal operation. Using 8 circuits, it is highly flexible. In light of its reliable performance, this T flip flop is well suited for TR. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Its output current of 16mAallows for maximum design flexibility. A total of 3input lines have been provided.