The flip flop is packaged in a case of 20-TSSOP (0.173, 4.40mm Width). The Tape & Reel (TR)package contains it. T flip flop uses Tri-State, Non-Invertedas its output configuration. JK flip flop uses Positive Edgeas the trigger. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates with an input voltage of 1.65V~3.6V volts. Temperature is set to -40°C~85°C TA. It belongs to the type D-Typeof flip flops. It belongs to the 74LCXseries of FPGAs. You should not exceed 150MHzin its output frequency. The element count is 1 . JK flip flop belongs to 74LCX574 family. Input capacitance of this device is 7pF farads. There is an electronic component mounted in the way of Surface Mount. It is designed with 20 pins. This device's clock edge trigger type is Positive Edge. There is 10μA quiescent current consumption by it.
TC74LCX574FTELM Features
Tape & Reel (TR) package 74LCX series 20 pins
TC74LCX574FTELM Applications
There are a lot of Toshiba Semiconductor and Storage TC74LCX574FTELM Flip Flops applications.