Clock PLL is embedded in the SOIC package. The peak reflow temperature (Cel) amounts to 240 to be essentially indestructible. 16 terminations can be found in frequency generators. The supply voltage of 3.3V allows for high efficiency. LVTTL is designed for clock generator's input. 1 circuits are used to achieve clock PLL's superior flexibility. 133MHz is the maximal value for normal operation. The maximal supply voltage (Vsup) reaches 3.6V. The supply voltage (Vsup) should be kept above 3V for normal operation. Clock PLL is equipped with 16 pin count. The operating temperature should be higher than -40°C. The operating temperature should be lower than 85°C. Clock generator can also be included into Clock Drivers. The maximal same edge skew (tskwd) can not be exceeded. There are 8 true outputs. This clock generator belongs to the family of 23S. The logic IC PLL clock adopts is PLL BASED CLOCK DRIVER.
IDT23S09-1HDCI Features
Available in the SOIC Supply voltage of 3.3V 8 true outputs
IDT23S09-1HDCI Applications
There are a lot of Integrated Device Technology (IDT) IDT23S09-1HDCI Clock Generators applications.