1.4V~3.6V 250MHz 16 Bit D-Type Flip Flop 74VCXH16374 48 Pins 20μA 74VCXH Series 48-TFSOP (0.240, 6.10mm Width)
SOT-23
74VCXH16374MTDX Datasheet
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Specifications
Name
Value
Type
Parameter
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
48-TFSOP (0.240, 6.10mm Width)
Number of Pins
48
Supplier Device Package
48-TSSOP
Operating Temperature
-40°C~85°C TA
Packaging
Tape & Reel (TR)
Series
74VCXH
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Type
D-Type
Max Operating Temperature
85°C
Min Operating Temperature
-40°C
Voltage - Supply
1.4V~3.6V
Frequency
250MHz
Base Part Number
74VCXH16374
Function
Standard
Output Type
Tri-State, Non-Inverted
Number of Elements
2
Polarity
Non-Inverting
Number of Circuits
2
Max Supply Voltage
3.6V
Min Supply Voltage
1.4V
Number of Bits
16
Clock Frequency
250MHz
Propagation Delay
7.8 ns
Turn On Delay Time
1.5 ns
Logic Function
D-Type, Flip-Flop
Current - Quiescent (Iq)
20μA
Current - Output High, Low
24mA 24mA
Number of Bits per Element
8
Max Propagation Delay @ V, Max CL
3ns @ 3.3V, 30pF
Trigger Type
Positive Edge
High Level Output Current
-24mA
Input Capacitance
6pF
Low Level Output Current
24mA
Number of Input Lines
2
Number of Output Lines
16
Clock Edge Trigger Type
Positive Edge
RoHS Status
RoHS Compliant
Lead Free
Lead Free
Pricing & Ordering
Quantity
Unit Price
Ext. Price
1
$0.85000
$0.85
500
$0.8415
$420.75
1000
$0.833
$833
1500
$0.8245
$1236.75
2000
$0.816
$1632
2500
$0.8075
$2018.75
74VCXH16374MTDX Product Details
74VCXH16374MTDX Overview
The flip flop is packaged in a case of 48-TFSOP (0.240, 6.10mm Width). As part of the package Tape & Reel (TR), it is embedded. In the configuration, Tri-State, Non-Invertedis used as the output. The trigger it is configured with uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1.4V~3.6V volts. Currently, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. The 74VCXHseries comprises this type of FPGA. Its output frequency should not exceed 250MHz. D latch consists of 2 elements. T flip flop consumes 20μA quiescent energy. The 74VCXH16374 family contains it. Its input capacitance is 6pF farads. It is mounted in the way of Surface Mount. 48pins are included in its design. This device has the clock edge trigger type of Positive Edge. There are 16bits in its design. Its superior flexibility is attributed to its use of 2 circuits. There are 16 output lines in this JK flip flop. Currently, there are 2 input lines present. High level output current is set to -24mA. Low level output current is set to 24mA. There should be a temperature below 85°Cduring operation. Temperatures above -40°Cshould be used. The minimum voltage required for operation is 1.4V. It supports the maximal supply voltage of 3.6V. The frequency that can be achieved is 250MHz.