4.75V~5.25V 60MHz JK Type Flip Flop DUAL 74S Series 16-DIP (0.300, 7.62mm)
SOT-23
DM74S112N Datasheet
non-compliant
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Specifications
Name
Value
Type
Parameter
Mounting Type
Through Hole
Package / Case
16-DIP (0.300, 7.62mm)
Surface Mount
NO
Operating Temperature
0°C~70°C TA
Packaging
Tube
Series
74S
JESD-609 Code
e0
Pbfree Code
no
Part Status
Obsolete
Moisture Sensitivity Level (MSL)
3 (168 Hours)
Number of Terminations
16
Type
JK Type
Terminal Finish
TIN LEAD
Technology
TTL
Voltage - Supply
4.75V~5.25V
Terminal Position
DUAL
Peak Reflow Temperature (Cel)
NOT SPECIFIED
Supply Voltage
5V
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Function
Set(Preset) and Reset
Qualification Status
Not Qualified
Output Type
Differential
Number of Elements
2
Supply Voltage-Min (Vsup)
4.75V
Clock Frequency
60MHz
Family
S
Current - Output High, Low
1mA 20mA
Output Polarity
COMPLEMENTARY
Number of Bits per Element
1
Trigger Type
Negative Edge
fmax-Min
80 MHz
Height Seated (Max)
5.08mm
RoHS Status
Non-RoHS Compliant
DM74S112N Product Details
DM74S112N Overview
16-DIP (0.300, 7.62mm)is the packaging method. A package named Tubeincludes it. In the configuration, Differentialis used as the output. It is configured with a trigger that uses a value of Negative Edge. There is an electrical part that is mounted in the way of Through Hole. A supply voltage of 4.75V~5.25V is required for operation. 0°C~70°C TAis the operating temperature. JK Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74Sseries FPGA. A frequency of 60MHzshould not be exceeded by its output. The list contains 2 elements. A total of 16terminations have been recorded. The power supply voltage is 5V. In terms of electronic devices, this device belongs to the Sfamily of devices. Keeping the supply voltage (Vsup) above 4.75V is necessary for normal operation.
DM74S112N Features
Tube package 74S series
DM74S112N Applications
There are a lot of Rochester Electronics, LLC DM74S112N Flip Flops applications.