2.7V~3.6V 150MHz 16 Bit D-Type Flip Flop 74LVT162374 48 Pins 74LVT Series 48-TFSOP (0.240, 6.10mm Width)
SOT-23
74LVT162374DGG,518 Datasheet
non-compliant
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Specifications
Name
Value
Type
Parameter
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
48-TFSOP (0.240, 6.10mm Width)
Number of Pins
48
Operating Temperature
-40°C~85°C TA
Packaging
Tape & Reel (TR)
Series
74LVT
Part Status
Active
Moisture Sensitivity Level (MSL)
2 (1 Year)
Type
D-Type
Voltage - Supply
2.7V~3.6V
Base Part Number
74LVT162374
Function
Standard
Output Type
Tri-State, Non-Inverted
Operating Supply Voltage
3.3V
Number of Elements
2
Polarity
Non-Inverting
Number of Bits
16
Clock Frequency
150MHz
Propagation Delay
5.3 ns
Quiescent Current
70μA
Turn On Delay Time
3 ns
Logic Function
D-Type, Flip-Flop
Current - Output High, Low
12mA 12mA
Max Propagation Delay @ V, Max CL
5.3ns @ 3.3V, 50pF
Trigger Type
Positive Edge
Input Capacitance
3pF
Number of Output Lines
8
Clock Edge Trigger Type
Positive Edge
Radiation Hardening
No
RoHS Status
ROHS3 Compliant
74LVT162374DGG,518 Product Details
74LVT162374DGG,518 Overview
The flip flop is packaged in a case of 48-TFSOP (0.240, 6.10mm Width). There is an embedded version in the package Tape & Reel (TR). T flip flop is configured with an output of Tri-State, Non-Inverted. Positive Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. A voltage of 2.7V~3.6Vis used as the supply voltage. In this case, the operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. This type of FPGA is a part of the 74LVT series. In order for it to function properly, its output frequency should not exceed 150MHz. The element count is 2 . The object belongs to the 74LVT162374 family. Its input capacitance is 3pFfarads. There is an electronic part that is mounted in the way of Surface Mount. It is designed with 48 pins. This device has the clock edge trigger type of Positive Edge. 16bits are used in its design. It is recommended that the supply voltage be kept at 3.3Vto maximize efficiency. There are 8 output lines on it. This D latch consumes 70μA quiescent current at all.