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CD74ACT112M

CD74ACT112M

CD74ACT112M

Texas Instruments

4.5V~5.5V 100MHz JK Type Flip Flop DUAL 74ACT112 16 Pins 74ACT Series 16-SOIC (0.154, 3.90mm Width)

SOT-23

CD74ACT112M Datasheet

non-compliant

In-Stock: 0 items
Specifications
Name Value
Type Parameter
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 3 days ago)
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 16-SOIC (0.154, 3.90mm Width)
Number of Pins 16
Weight 141.690917mg
Operating Temperature -55°C~125°C TA
Packaging Tube
Series 74ACT
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
ECCN Code EAR99
Type JK Type
Subcategory FF/Latch
Technology CMOS
Voltage - Supply 4.5V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Base Part Number 74ACT112
Function Set(Preset) and Reset
Output Type Differential
Operating Supply Voltage 5V
Polarity Non-Inverting
Power Supplies 5V
Number of Circuits 2
Load Capacitance 50pF
Output Current 24mA
Clock Frequency 100MHz
Propagation Delay 10.3 ns
Quiescent Current 4μA
Turn On Delay Time 2.6 ns
Family ACT
Logic Function AND, Flip-Flop, JK-Type
Current - Output High, Low 24mA 24mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 10.3ns @ 5V, 50pF
Trigger Type Negative Edge
Input Capacitance 10pF
Schmitt Trigger No
Power Supply Current-Max (ICC) 0.04mA
Clock Edge Trigger Type Negative Edge
Height 1.75mm
Length 9.9mm
Width 3.91mm
Thickness 1.58mm
Radiation Hardening No
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free
Pricing & Ordering
Quantity Unit Price Ext. Price
1 $0.92000 $0.92
10 $0.81200 $8.12
40 $0.76250 $30.5
120 $0.62242 $74.6904
520 $0.49200 $255.84
1,000 $0.39360 $0.3936
2,520 $0.35670 $0.7134
5,000 $0.33210 $1.6605
CD74ACT112M Product Details

CD74ACT112M Overview


The item is packaged in 16-SOIC (0.154, 3.90mm Width)cases. The package Tubecontains it. Currently, the output is configured to use Differential. There is a trigger configured with Negative Edge. There is an electronic component mounted in the way of Surface Mount. A supply voltage of 4.5V~5.5V is required for operation. -55°C~125°C TAis the operating temperature. JK Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 74ACTseries FPGA. There should be no greater frequency than 100MHzon its output. The number of terminations is 16. D latch belongs to the 74ACT112 family. The D flip flop is powered by a voltage of 5V . A JK flip flop with a 10pFfarad input capacitance is used here. In this case, the D flip flop belongs to the ACTfamily. In this case, the electronic component is mounted in the way of Surface Mount. It is designed with 16 pins. It has a clock edge trigger type of Negative Edge. This device is part of the FF/Latchbase part number family. Despite its superior flexibility, it relies on 2 circuits to achieve it. It runs on 5Vvolts of power. If high efficiency is desired, the supply voltage should be kept at 5V. With a current output of 24mA , it offers maximum design flexibility. There is 4μA quiescent current consumption by it.

CD74ACT112M Features


Tube package
74ACT series
16 pins
5V power supplies

CD74ACT112M Applications


There are a lot of Texas Instruments CD74ACT112M Flip Flops applications.

  • Pattern generators
  • Modulo – n – counter
  • Differential Individual
  • Functionally equivalent to the MC10/100EL29
  • Supports Live Insertion
  • Circuit Design
  • Counters
  • Matched Rise and Fall
  • Guaranteed simultaneous switching noise level
  • Latch-up performance

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