2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop DUAL 74LVTH273 20 Pins 190μA 74LVTH Series 20-SOIC (0.295, 7.50mm Width)
SOT-23
SN74LVTH273DWRG4 Datasheet
non-compliant
In-Stock: 0 items
Specifications
Name
Value
Type
Parameter
Factory Lead Time
6 Weeks
Lifecycle Status
ACTIVE (Last Updated: 6 days ago)
Mount
Surface Mount
Mounting Type
Surface Mount
Package / Case
20-SOIC (0.295, 7.50mm Width)
Number of Pins
20
Weight
500.709277mg
Operating Temperature
-40°C~85°C TA
Packaging
Tape & Reel (TR)
Series
74LVTH
JESD-609 Code
e4
Pbfree Code
yes
Part Status
Active
Moisture Sensitivity Level (MSL)
1 (Unlimited)
Number of Terminations
20
Type
D-Type
Terminal Finish
Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory
FF/Latches
Packing Method
TR
Technology
BICMOS
Voltage - Supply
2.7V~3.6V
Terminal Position
DUAL
Terminal Form
GULL WING
Peak Reflow Temperature (Cel)
260
Supply Voltage
3.3V
[email protected] Reflow Temperature-Max (s)
NOT SPECIFIED
Base Part Number
74LVTH273
Function
Master Reset
Qualification Status
Not Qualified
Output Type
Non-Inverted
Operating Supply Voltage
3.3V
Number of Elements
1
Polarity
Non-Inverting
Supply Voltage-Max (Vsup)
3.6V
Supply Voltage-Min (Vsup)
2.7V
Load Capacitance
50pF
Output Current
64mA
Number of Bits
8
Clock Frequency
150MHz
Propagation Delay
3.2 ns
Turn On Delay Time
3.2 ns
Family
LVT
Current - Quiescent (Iq)
190μA
Current - Output High, Low
32mA 64mA
Max I(ol)
0.064 A
Max Propagation Delay @ V, Max CL
4.9ns @ 3.3V, 50pF
Prop. [email protected]
4.9 ns
Trigger Type
Positive Edge
Input Capacitance
4pF
Power Supply Current-Max (ICC)
5mA
Number of Input Lines
8
Clock Edge Trigger Type
Positive Edge
Height
2.65mm
Length
12.8mm
Width
7.5mm
Thickness
2.35mm
RoHS Status
ROHS3 Compliant
Lead Free
Lead Free
SN74LVTH273DWRG4 Product Details
SN74LVTH273DWRG4 Overview
The flip flop is packaged in a case of 20-SOIC (0.295, 7.50mm Width). A package named Tape & Reel (TR)includes it. T flip flop uses Non-Invertedas the output. It is configured with a trigger that uses a value of Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates at 2.7V~3.6Vvolts. It is operating at -40°C~85°C TA. D-Typeis the type of this D latch. This type of FPGA is a part of the 74LVTH series. This D flip flop should not have a frequency greater than 150MHz. The list contains 1 elements. As a result, it consumes 190μA of quiescent current without being affected by external factors. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. It is a member of the 74LVTH273 family. The power source is powered by 3.3V. Its input capacitance is 4pF farads. The electronic device belongs to the LVTfamily. Electronic part Surface Mountis mounted in the way. 20pins are included in its design. This device's clock edge trigger type is Positive Edge. The part you are looking for is included in FF/Latches. This flip flop is designed with 8 Bits. Vsup reaches 3.6V, the maximal supply voltage. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2.7V. As a result of its reliability, this D flip flop is ideally suited for TR. For high efficiency, the supply voltage should be kept at 3.3V. Featuring the maximum design flexibility, it has an output current of 64mA . A total of 8input lines have been provided.